x86: Vectorize roundeven
Vectorizes the roundeven math operation on x86 using SSE and AVX instructions.
This commit introduces vectorization for the roundeven math function on x86 architectures. It leverages SSE and AVX instructions, specifically (v)roundp[sd] and vrndscalep[hsd], to efficiently perform this operation on multiple data points simultaneously. The change includes new machine descriptions and test cases for various SSE and AVX instruction sets.
In Details
This commit adds new RTL patterns to x86's sse.md to vectorize the roundeven intrinsic. It uses the vrndscalep instructions, which are the SSE/AVX equivalents of roundeven. This should improve performance for floating-point rounding operations when using SIMD. The change affects the scalar and vector rounding operations.
- vectorize
- To modify code to operate on multiple data elements simultaneously, typically using specialized SIMD (Single Instruction, Multiple Data) instructions.
- roundeven
- A floating-point rounding mode that rounds to the nearest even number. If the fractional part is exactly 0.5, it rounds to the nearest even integer.
- SSE
- Streaming SIMD Extensions. A set of CPU instructions for accelerating multimedia and general-purpose code. It introduces 128-bit registers for parallel data processing.
- AVX
- Advanced Vector Extensions. An extension to SSE that adds 256-bit and later 512-bit registers, allowing for wider SIMD operations and improved performance.
- RTL
- Register Transfer Language. An intermediate representation used by GCC to describe the execution of code in a way that is closer to machine code but still machine-independent.