rs6000: Fix lane extraction for vec_extract
Corrects lane extraction in `vec_extract` by ensuring special handling only for relevant swappable instructions.
This commit refactors the rs6000_analyze_swaps function to accurately handle vec_extract operations. It ensures that special handling for swappable instructions is applied only when webs contain permuting load/store instructions, preventing unnecessary adjustments to extracted lanes and improving code generation for non-permuting loads/stores.
In Details
Addresses PR rtl-optimization/106770 by refining the logic in rs6000_analyze_swaps. The change corrects vec_extract lane adjustment by ensuring special handling is reserved for webs with actual swappable instructions (permuting loads/stores with associated swaps). It introduces non_permuting_mem_insn and handle_non_permuting_mem_insn to correctly process non-permuting loads/stores by converting them to permuting ones, thereby avoiding incorrect code generation. It also explicitly excludes webs where swaps on vector constants are replaced by loads of swapped constants, or where permuti…
- rs6000
- GCC target architecture support for IBM POWER processors, including PowerPC variants.
- vec_extract
- A function or operation that extracts a single element (lane) from a vector data type.
- swappable instructions
- Machine instructions that can be reordered or rearranged, often involving data movement and permutation operations, particularly in vector processing.
- webs
- In the context of GCC's RTL, 'webs' often refer to groups of related instructions or data dependencies within a basic block.
- permuting load/store
- Memory access instructions that rearrange data elements within a vector register during a load or store operation.