Fix LoongArch miscompile for `both_non_zero` with matching operands.
Corrects LoongArch code generation for `both_non_zero` when operands[0] equals operands[2].
A miscompilation on LoongArch occurred in both_non_zero and both_non_zero_subreg instructions when operands[0] was identical to operands[2]. This is because operands[0] was being written before operands[2] was fully used, necessitating an early-clobber designation. The fix defers register splitting until after reload and ensures operands[0] and operands[2] reside in distinct hard registers.
In Details
On LoongArch, the both_non_zero and both_non_zero_subreg instructions in loongarch.md suffered from a miscompile when operands[0] == operands[2]. The issue stemmed from operands[0] being an earlyclobber but not declared as such, leading to incorrect register allocation. The fix defers the split of the earlyclobber pseudo register until after reload, and explicitly constrains operands[0] and operands[2] to different hard registers, addressing PR127153.
- LoongArch
- A RISC-based instruction set architecture developed in China.
- earlyclobber
- A constraint in machine description files that indicates an operand is both read and written by an instruction, and that the write must happen before the read of other operands is complete.
- register allocation
- The process by which the compiler assigns program variables and temporary values to the limited number of available CPU registers to improve performance.
- reload
- A phase in the compiler's code generation where tentative register assignments are finalized, and memory spills or re-assignments occur if necessary.