GCC Newspaper
OCTOBER 6, 2026
Date
/
Architectures
Components
Topics
News & Policy
Other
x86 Performance Win

Allow minus ones and constants for MASK/SSE registers.

Enables direct loading of -1 into mask registers and constants into SSE registers on x86.

The x86 backend now allows direct loading of minus ones into MASK registers and standard constants into SSE registers. This change replaces memory loads with more efficient register operations, such as using kxnor %k0, %k0, %k0 to load -1 into a mask register, which can improve performance for certain instruction sequences. Several test cases have been added to verify this functionality.

In Details

In ix86_preferred_reload_class, this commit modifies the handling of reload classes for MASK (k) and SSE (xmm) registers. For MASK registers, it allows the use of minus ones directly, enabling instructions like kxnor for efficient initialization. For SSE registers, it permits standard constants, avoiding memory loads. This addresses PR target/126959.

For Context
MASK register
Registers (k0-k7) used in x86's AVX-512 instruction set to control which elements of a vector are active.
SSE register
Registers (xmm0-xmm15, ymm0-ymm15, zmm0-zmm31) used for Streaming SIMD Extensions (SSE) and Advanced Vector Extensions (AVX) instructions, which perform single-instruction, multiple-data operations.
Minus ones
A bit pattern representing all ones in a given data type, often used for initialization or as a mask.
reload class
In GCC's register allocation, a preferred set of registers for a particular operand type or operation, influencing instruction scheduling and register assignment.
Filed Under: x86optimizationAVX512