RISC-V: Add Ascalon XG CPU support
Adds support for the Ascalon XG processor core to GCC's RISC-V backend, including its specific microarchitectural features and performance characteristics.
GCC’s RISC-V backend now includes support for the Ascalon XG CPU. This commit adds the necessary definitions to riscv-cores.def, riscv-opts.h, and riscv.md to recognize the tt-ascalon-xg microarchitecture. The Ascalon XG differs from the Ascalon X by lacking the zvkng extension and featuring reduced vector floating-point double-precision throughput. New defines for CPU units and reservations in tt-ascalon-d8.md capture these microarchitectural details for instruction scheduling and optimization.
In Details
This commit adds support for the Ascalon XG (tt-ascalon-xg) core to the RISC-V backend. It introduces new entries in riscv-cores.def and riscv-opts.h, and importantly, defines specific CPU units and reservations in tt-ascalon-d8.md. Key differences noted are the absence of the zvkng extension and reduced FP64 vector throughput compared to Ascalon X. These definitions are crucial for accurate instruction scheduling and optimization targeting this core.
- RISC-V
- An open-standard Instruction Set Architecture (ISA) based on RISC principles, widely adopted for custom silicon and embedded systems.
- CPU core
- The fundamental processing unit within a processor. Different CPU cores have varying architectures, instruction sets, and performance characteristics.
- Microarchitecture
- The specific implementation of an Instruction Set Architecture (ISA) in a processor. It defines the pipeline, cache hierarchy, execution units, and other internal details that affect performance.
- zvkng
- A RISC-V extension that provides support for cryptographic operations, specifically for the Keccak (SHA-3) algorithm.
- vector floating-point
- Instructions that operate on multiple data elements simultaneously using wide registers, commonly used for scientific computing and signal processing. This refers to FP64 (64-bit double-precision) operations.
- md file
- In GCC, a Machine Description file (.md) that defines the instruction set, addressing modes, and scheduling constraints for a specific target architecture.