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OCTOBER 6, 2026
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match-sat-alu.pd Performance Win

match-sat-alu.pd: Recognize complement masks for unsigned saturating truncation

GCC's pattern matcher now recognizes an alternative way to express unsigned saturating truncation using bitwise complement.

The GCC pattern matcher in match-sat-alu.pd has been updated to recognize unsigned saturating truncation when the sign mask is formed using a bitwise complement (~X) instead of negation (-X). This optimization avoids potential issues with negating the minimum signed value and can lead to more efficient code generation, as demonstrated by an AArch64 example showing a reduction from multiple instructions to a single smax and uqxtn sequence.

In Details

The match-sat-alu.pd pattern matcher now handles a new variant of unsigned saturating truncation, specifically when the mask is derived via complement (~X) instead of negation (-X). This pattern is useful as it correctly handles edge cases and can be more efficiently mapped to hardware instructions. The change ensures that the unsigned range comparison is preserved, as a signed comparison would not correctly clamp negative inputs. This enhancement improves the patterns available for saturation and truncation operations within the compiler's arithmetic logic unit (ALU) matching.

For Context
unsigned saturating truncation
A process that converts a value to a narrower unsigned integer type, clamping the result to the maximum value of the target type if the original value exceeds it. This prevents overflow by capping the result at the highest representable value for the unsigned type.
bitwise complement (~X)
An operation that flips every bit in the binary representation of a number. For signed integers, it's equivalent to -X - 1.
pattern matcher
A component within a compiler that identifies specific sequences of intermediate representation (IR) operations that can be replaced by more efficient instructions or simpler IR forms. This is crucial for optimization.
Filed Under: optimizationgccaarch64