amdgcn: Spill scalars to both SGPRs and AVGPRs for performance
AMDGCN backend now spills scalars to both SGPRs and AVGPRs, improving performance across various benchmarks.
The AMD GCN backend in GCC has been updated to allow scalars residing in Vector General Purpose Registers (VGPRs) to be spilled into either Scalar General Purpose Registers (SGPRs) or Additional VGPRs (AVGPRs). This change addresses performance regressions observed when scalars were exclusively spilled to SGPRs, by providing flexibility in register allocation. The new approach improves performance across a range of benchmarks by better managing register pressure.
In Details
Following a previous change that shifted scalar VGPR spills to SGPRs, this commit reintroduces the ability to spill scalars to AVGPRs on the AMD GCN target. The gcn_spill_class function now uses SCALAR_SPILL_REGS, which encompasses both SGPRs and AVGPRs, and gcn_memory_move_cost is updated to handle this. This dual-spilling strategy mitigates performance degradation caused by SGPR pressure, restoring or improving performance in benchmarks that were negatively impacted by the earlier SGPR-only spill approach.
- amdgcn
- The AMD Graphics Core Next (GCN) architecture, a GPU architecture developed by AMD. GCC's amdgcn backend targets these GPUs for computation.
- spill
- When a processor runs out of available registers, it 'spills' the contents of some registers to memory (or a different set of registers) to free them up for use. This is a common compiler optimization technique to manage register pressure.
- SGPR
- Scalar General Purpose Register. In architectures like AMD's GCN, SGPRs are a class of registers typically used for scalar values and control flow.
- VGPR
- Vector General Purpose Register. VGPRs are used to hold vector data, allowing for SIMD (Single Instruction, Multiple Data) operations on multiple elements simultaneously.
- AVGPR
- Additional Vector General Purpose Register. AVGPRs provide extra register space for VGPRs, helping to alleviate register pressure.