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OCTOBER 6, 2026
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avr Performance Win

AVR: Optimize register comparisons with constants divisible by 256

Reduces AVR compare instruction count when comparing registers to constants.

This patch optimizes comparisons of AVR registers against constants. When the constant is a multiple of 256, the compiler now uses a more efficient instruction sequence for equality (EQ) and inequality (NE) checks. This change reduces the generated code size by one instruction in such cases, improving performance and code density for specific AVR targets.

In Details

The AVR backend's avr_out_compare function is updated to use a new avr_out_perm_compare_eqne static function. This new function implements an optimization for register == constant and register != constant comparisons when the constant is congruent to 0 mod 256. The optimization replaces multi-byte immediate loads and comparisons with a single cpi and subsequent cpc instructions against zero, reducing code size.

For Context
AVR
A family of microcontrollers developed by Atmel (now Microchip Technology). GCC supports generating code for various AVR devices.
EQ
Equality comparison instruction.
NE
Inequality comparison instruction.
CPI
Compare immediate. An AVR instruction that compares a register with an immediate value.
CPC
Compare with carry. An AVR instruction that compares a register with another register, taking the carry flag into account.
Filed Under: avroptimizationcode size