i386, rtl: Consolidate register class macros into a hook
Replaces multiple register class macros with a single target hook for better flexibility.
This commit refactors the definition of register class constraints in GCC’s RTL (Register Transfer Language) by replacing several macros (BASE_REG_CLASS, MODE_BASE_REG_CLASS, etc.) with a single, unified target hook TARGET_BASE_REG_CLASS. This change simplifies the target definition interface and prepares for future extensions, such as adding support for memory operands.
In Details
The i386 and general RTL handling of base registers is consolidated by replacing the BASE_REG_CLASS, MODE_BASE_REG_CLASS, MODE_BASE_REG_REG_CLASS, MODE_CODE_BASE_REG_CLASS, and INSN_BASE_REG_CLASS macros with a single target hook, TARGET_BASE_REG_CLASS. A new MEM parameter is added to this hook to accommodate future needs, such as in the AMD GCN backend. The existing macro behavior is preserved as the default implementation of the hook, minimizing immediate impact, while INSN_BASE_REG_CLASS is removed as it was only used by i386.
- i386
- Refers to the x86 instruction set architecture, including 32-bit processors like the Intel 80386 and its successors.
- RTL
- Register Transfer Language. GCC's internal intermediate representation used to describe machine instructions and operations before they are translated into final machine code.
- register class
- A classification of machine registers that have similar properties or can be used for the same purposes. This helps the compiler allocate registers efficiently.
- target hook
- A mechanism in GCC that allows backends to customize compiler behavior through a set of predefined functions or variables. Target hooks provide a flexible way to adapt the compiler to different architectures.
- macro
- A piece of code that represents a longer sequence of programming instructions. In C and GCC's internal code, macros are used for code reuse and conditional compilation.
- MEM
- GCC's internal representation for a memory access, typically involving an address and possibly an offset and access mode.