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OCTOBER 6, 2026
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postreload Performance Win

Postreload: Recover branch condition through cc register

Improves CSE analysis for branches by recovering condition codes from the cc register.

This commit enhances the postreload pass to recover branch conditions even when they are not directly carried by the jump instruction itself. Previously, optimization was limited to targets where the comparison was embedded in the jump (like RISC-V or MIPS). The change uses get_condition to find the comparison in the cc register, enabling common subexpression elimination for more cases. This optimization is guarded to prevent performance regressions, ensuring it’s only applied when beneficial.

In Details

The reload_cse_regs_1 function in postreload.cc previously relied on implicit sets on conditional branch edges to inform CSE about register conditions, but this only worked when the jump instruction itself carried the comparison. This patch introduces get_condition to examine the cc register, allowing CSE to recover the branch condition even when it's a separate instruction preceding the jump. The change is guarded by a profitability check (similar to reload_cse_simplify_set) to avoid regressions, as seen in the bcmrpi_defconfig kernel example where unguarded changes led to code blo…

For Context
postreload
A GCC optimization pass that runs after register allocation (reload) to perform further optimizations on the generated RTL.
CSE
Common Subexpression Elimination. An optimization technique that identifies and replaces identical expressions with a single instance.
cc register
Condition Code register. A special register that stores the result of comparison operations, used by conditional branch instructions.
RTL
Register Transfer Language. GCC's internal intermediate representation used to represent code after register allocation.
Filed Under: optimizationcompilercse