Add AVX10/v2 FP32 to FP8 biased conversions.
Enables biased conversions between FP32 and FP8 formats using AVX10/v2 intrinsics.
This commit introduces biased conversion intrinsics for AVX10/v2, enabling conversions between FP32 (single-precision float) and FP8 (BF8/HF8) formats with biased exponent handling. It adds support for 128, 256, and 512-bit vectors, including masked operations. The changes incorporate new intrinsic definitions, built-in types, and machine description patterns, along with test cases to verify the functionality for AI and HPC applications.
In Details
This patch adds AVX10/v2 intrinsics for biased conversions between FP32 and FP8 (BF8/HF8) floating-point formats. It supports 128, 256, and 512-bit vectors with various masking options for both FP32-to-FP8 and FP8-to-FP32 biased conversions. The implementation includes new intrinsics in avx10v2auxintrin.h, type definitions in i386-builtin-types.def, builtin descriptions in i386-builtin.def, and machine code patterns in sse.md. New test cases are added to gcc.target/i386/ to validate these specific biased conversions on compliant x86 hardware.
- Biased conversion
- A floating-point conversion where the exponent is adjusted by a specific bias value. This is often used in specific hardware implementations or numerical formats where a direct conversion might not be optimal or possible.
- FP32
- Single-precision floating-point format, a standard 32-bit representation for floating-point numbers defined by IEEE 754, commonly used in general-purpose computing.
- FP8
- An 8-bit floating-point format, increasingly used in machine learning and AI accelerators for its reduced memory footprint and computational cost compared to FP16 or FP32.
- AVX10/v2
- An extension to the AVX (Advanced Vector Extensions) instruction set for x86 processors, introducing new features and capabilities, including support for newer floating-point formats like FP8.
- Intrinsics
- Special functions or constructs provided by a compiler that allow programmers to access low-level hardware instructions directly, often for performance-critical operations like vector arithmetic.