AArch64: Fix FFR widening loads bug with alternate approach
Resolves a compiler bug affecting AArch64 SVE widening loads by restructuring FFR update handling.
This commit introduces an alternative fix for a bug in the AArch64 SVE (Scalable Vector Extension) handling, specifically related to fused-first-register (FFR) widening loads and common subexpression elimination (CSE). The previous fix interfered with FFR widening loads. This new approach moves the SET instruction for the source operand into the update_ffr token, resolving the CSE issue while maintaining support for vectorizer-generated widening loads and improving maintainability.
In Details
This change revisits PR126629 for AArch64 SVE, addressing an issue where CSE optimization broke FFR widening loads. The previous fix in emit_ldf1_ffr_update was deemed difficult to maintain and inappropriate. This commit refactors the process by moving the SET src UNSPEC into the update_ffr 'token' parameter of the svldff1_gather_* and svldxf1_* instructions. This preserves the CSE fix and ensures FFR widening loads from the vectorizer continue to function correctly.
- AArch64
- The 64-bit ARM architecture, commonly used in mobile devices and increasingly in servers and laptops.
- SVE
- Scalable Vector Extension, an ARM instruction set architecture feature that allows vector registers to have a variable length, adapting to the hardware. This enables code to run efficiently across a range of devices.
- FFR
- Fused-First-Register, a concept in AArch64 SVE related to how instructions can fuse operations or use specific registers to optimize data flow, particularly in vector processing.
- widening load
- In vector processing, a load operation that fetches data from memory and places it into a vector register, potentially expanding the data to fill the entire vector, often used for scalar expansion.
- CSE
- Common Subexpression Elimination, an optimization technique that identifies and replaces identical expressions in the code with a single computation to reduce redundant work.
- vectorizer
- A compiler component that attempts to automatically rewrite scalar (non-vector) code into vector instructions, allowing a single instruction to operate on multiple data elements simultaneously for performance gains.