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OCTOBER 6, 2026
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aarch64 Performance Win

AArch64: Support HFmode and BFmode in isinf, isfinite and isnan [PR 66462]

AArch64 now correctly handles floating-point classification for 16-bit formats (_Float16 and __bf16) in isinf, isfinite, and isnan.

The AArch64 backend now supports __builtin_isinf, __builtin_isfinite, and __builtin_isnan for the 16-bit floating-point formats HFmode (_Float16) and BFmode (__bf16). Previously, these built-ins were limited to single (SFmode) and double (DFmode) precision, forcing classification through less accurate floating-point comparisons for smaller types. The new implementation uses integer arithmetic on a zero-extended representation of the floating-point values.

In Details

This patch extends AArch64's isinf, isfinite, and isnan expanders to HFmode and BFmode. Previously, these only supported SFmode and DFmode, resorting to FP comparisons for 16-bit types. Since AArch64 lacks native 16-bit integer arithmetic for these modes, the commit zero-extends the 16-bit encoding into a wider integer register and performs the classification there. New test cases are added to verify this functionality, specifically addressing PR66462.

For Context
HFmode
GCC internal mode for the IEEE 754 half-precision floating-point format (_Float16, 16 bits).
BFmode
GCC internal mode for the Brain Float 16 (BF16) format (__bf16, 16 bits).
SFmode
GCC internal mode for the IEEE 754 single-precision floating-point format (float, 32 bits).
DFmode
GCC internal mode for the IEEE 754 double-precision floating-point format (double, 64 bits).
Filed Under: aarch64floating-pointbuiltins