Recognize high-part multiply for types lacking vector forms.
Enables vectorization of high-part multiplies for types without direct vector representations.
This change enhances the vectorization pass to recognize high-part multiply operations even when the widened type (e.g., 128-bit result of a 64-bit multiply) does not have a direct vector form on the target architecture. Previously, the pattern matching would fail in such cases, preventing vectorization. Now, the pattern matching continues even without a vector type for the output, allowing the cast to be recognized and the over-widening machinery to handle it, thus enabling scalar code using these operations to be vectorized.
In Details
The vect_recog_mulhs_pattern in tree-vect-patterns.cc has been modified to not give up when the LHS_TYPE has no vector type. This addresses a limitation where the pattern for recognizing (a * b) >> N as IFN_MULH would fail if the resulting widened type (e.g., __int128 for 64-bit multiply) lacked a native vector form on the target. By allowing the pattern to proceed, the subsequent cast to the original type is still recognized, and over-widening logic can remove the excess bits, enabling vectorization for operations like 128-bit high-part multiplies on targets like AArch64 with SVE.
- vectorization
- A compiler optimization that performs the same operation on multiple data elements simultaneously using specialized instructions.
- high-part multiply
- An operation that computes the most significant part of the product of two numbers. For example, multiplying two 64-bit integers can result in a 128-bit product, and the high-part multiply extracts the upper 64 bits of this product.
- widened type
- A data type that has a larger range or precision than the original type, used to hold the result of an operation that might exceed the original type's capacity (e.g., a 128-bit type for the product of two 64-bit integers).
- vector form
- A data type or representation that can be directly manipulated by vector instructions on a specific processor architecture.
- IFN_MULH
- An internal GCC representation for a high-part multiply instruction, often mapped to hardware instructions like MULH.
- SVE (Scalable Vector Extension)
- An ARM architecture extension that provides vectors whose length is determined at runtime, allowing code to adapt to different hardware configurations.