RISC-V: Add conditional negate expansion

RISC-V gets a new instruction expansion for conditional negation of integral values.

By Naveen September 28, 2026 committed

A new expansion, negcc, has been added for integral comparisons on RISC-V architectures. This expansion implements the pattern ‘X ? -X : X’ using a sequence of compare, mask, XOR, and add operations. The new pseudo instruction helps existing if-conversion paths by providing a distinct output pseudo for the XOR result, ensuring it’s assigned only once. This change enables more efficient conditional negation for integral types on RISC-V.

In Details

This commit introduces a new RISC-V pseudo instruction, neg<mode>cc, to the RTL expansion. It implements conditional negation (X ? -X : X) using a combination of CMP, MASK, XOR, and ADD operations, where MASK is derived from the comparison result. A separate output pseudo is used for the XOR result to ensure single assignment. This pattern is intended to be consumed by existing if-conversion passes on RISC-V targets.

Filed Under: risc-voptimizationinstruction expansion

View Commit →