xtensa: Revert 'return' insn pattern changes
Reverts a change to how the 'return' instruction pattern is handled on Xtensa, restoring correct register allocation.
This commit reverts a change that incorrectly handled register allocation for the ‘return’ instruction pattern on Xtensa processors using the CALL0 ABI. Previously, specifying hard registers used by the return pattern via EPILOGUE_USES() interfered with DF information and register allocation. This reversion restores the previous behavior of directly using a USE RTX for the return address register, allowing it to be repurposed when needed.
In Details
This commit reverts a change in xtensa/xtensa.h and xtensa.md that affected how the return instruction pattern handles the A0 register. The original change used EPILOGUE_USES() for A0, which has side effects similar to global register variables. This interfered with DF analysis and register allocation by marking A0 as used across the entire function. The CALL0 ABI on Xtensa permits A0 to be repurposed, so this revert restores the '(use (reg:SI A0_REG))' to the return pattern and sibcall_epilogue, resolving an allocation issue.
- DF information
- Dataflow information, which compilers use to track the state of variables and registers throughout a program to enable optimizations.
- register allocation
- The process of assigning program variables and intermediate values to hardware registers to speed up execution. This is a crucial step in the compilation pipeline.
- EPILOGUE_USES()
- A macro used in GCC's machine description files to specify hard registers that are used by the function epilogue (the code that runs before returning from a function).
- CALL0 ABI
- A specific Application Binary Interface for the Xtensa architecture, defining how functions are called, arguments are passed, and return values are handled.
- RTX
- Representation of intermediate code in GCC. RTXs are used to represent instructions, operands, and other program elements before they are translated into machine code.