Fix emulated vector costing in GCC's vectorizer
Corrects a bug in GCC's vectorizer that caused ICEs when emulating vector operations without SIMD support.
This commit resolves an internal compiler error (ICE) in GCC’s vectorizer related to emulated vector operations. When SIMD instructions are unavailable (e.g., with -mgeneral-regs), the vectorizer attempts to emulate them. A recent transition in the costing logic caused it to incorrectly use an old interface, leading to a null pointer dereference. This fix updates the costing code to use the correct SLP node, resolving the ICE and a related test case.
In Details
This patch fixes an ICE in tree-vect-loop.cc and tree-vect-stmts.cc triggered by the SLP vectorizer's costing logic, specifically when emulating vector operations due to unavailable hardware SIMD support (e.g., -mgeneral-regs on AArch64). The info_for_reduction function incorrectly received stmt_info instead of slp_node due to a forgotten update during the SLP-only costing transition. The fix involves passing the slp_node and adding an assertion.
- vectorizer
- A compiler component that transforms scalar code into vector code, enabling simultaneous operations on multiple data elements using SIMD instructions.
- emulated vector operations
- Simulating vector operations using scalar instructions when the target architecture lacks native SIMD support.
- SIMD
- Single Instruction, Multiple Data. A class of parallel computers in Flynn's taxonomy that perform the same operation on multiple data points simultaneously.
- ICE
- Internal Compiler Error, a situation where the compiler encounters an unrecoverable internal state and terminates.
- SLP
- Superword-Level Parallelism. A vectorization technique that identifies and groups identical scalar operations on consecutive data elements for parallel execution.
- costing
- The process within a compiler where the performance impact or resource usage of different code transformations or instructions is estimated.