optabs: Fix atomic builtins expansion with aliasing memory
Corrects incorrect code generation for atomic builtins when memory operands might alias.
This commit addresses a bug in the fallback expansions of several GCC atomic builtins. When the operand involved in a TER operation is a MEM (or contains one) that could alias with the memory being atomically updated, incorrect code was generated. This patch forces the val operand into a pseudo register in such cases, resolving issues where the updated value was incorrectly used instead of the original value. It also fixes a problem where val could be read twice in compare-and-exchange loops.
In Details
This commit refactors optabs.cc to fix incorrect code generation for atomic builtins, particularly in fallback expansions involving TER operations where the operand is a MEM that might alias the target memory. The fix involves forcing the val operand into a pseudo register when it can alias the memory being updated. This prevents issues like using an already-updated value in subsequent operations or incorrectly reading val twice in compare-and-exchange loops, specifically addressing PR127336.
- optabs
- A table within GCC that stores information about machine-specific operations and their corresponding code generation patterns.
- atomic builtins
- Functions that perform operations on memory in an atomic manner, ensuring that the operation is completed indivisibly without interruption from other threads.
- TER
- A GCC internal representation for tree expressions.
- MEM
- GCC's internal representation for memory references.
- alias
- When two different memory addresses refer to the same location.
- pseudo register
- A temporary, virtual register used by the compiler during intermediate stages of code generation before final register allocation.