Don't turn quiet FP comparisons into signaling ones
Ensures quiet NaN FP comparisons do not raise FE_INVALID exceptions on i386.
This commit prevents floating-point unordered comparisons on i386 from incorrectly raising the FE_INVALID exception when encountering a quiet NaN. For AVX and AVX512, the compiler now selects the dedicated quiet predicate (_UQ). For older SSE2, where only signaling predicates were available for unordered comparisons, the compiler avoids these comparisons when trapping math is enabled and NaNs are honored, thus preventing unintended exceptions.
In Details
The ix86_fp_cmp_code_to_pcmp_immediate function in config/i386/i386-expand.cc is updated to return the _UQ predicate immediates for UNLE, UNLT, UNGE, UNGT, and UNEQ. This ensures that when using AVX/AVX512, the quiet predicates are selected, avoiding FE_INVALID on quiet NaNs. For SSE2, the vec_cmp expanders in config/i386/sse.md and config/i386/mmx.md now use a new predicate ix86_fp_vec_cmp_operator to reject these unordered comparison codes when trapping math is enabled, preventing them from being lowered to signaling predicates.
- Quiet NaN
- A Not-a-Number value that does not raise an exception when used in floating-point operations. It propagates through calculations without signaling an error.
- Signaling NaN
- A Not-a-Number value that raises the
FE_INVALIDexception when used in floating-point operations. This signals an exceptional condition. - FE_INVALID
- A floating-point exception flag indicating an invalid operation, such as dividing by zero or taking the square root of a negative number.
- SSE2
- Streaming SIMD Extensions 2, an instruction set extension for x86 processors that added support for 128-bit SIMD operations.
- AVX
- Advanced Vector Extensions, a SIMD instruction set extension for x86 processors that expanded the size of registers to 256 bits and added new instructions.