i386: Fix V2SF zero move in V4SF vec_init for non-SSE2 targets
i386: Fixes V4SF vec_init on targets without SSE2 by using emit_move_insn to materialize V2SF zeros correctly.
This patch resolves an issue on i386 targets that do not support SSE2, where initializing a V4SF vector with zeros for its upper V2SF half would fail. The old implementation used a raw SET instruction, bypassing fallbacks that would correctly materialize the zero using integer modes when movv2sf was unavailable. By switching to emit_move_insn, the zero is now correctly materialized as a DImode move, resolving the problem and generating expected code sequences.
In Details
On i386 targets with !TARGET_SSE2, ix86_expand_vector_init_v4sf previously used a raw SET for the zero upper V2SF half. This bypassed emit_move_insn_1's fallback to integer modes, leaving an unencodable RTX. The fix replaces SET with emit_move_insn, which correctly materializes the V2SF zero via a DImode move, resulting in the expected xorps/unpcklps/movlhps sequence.
- V2SFmode
- A GCC internal mode representing a vector of two single-precision floating-point values.
- V4SFmode
- A GCC internal mode representing a vector of four single-precision floating-point values.
- SSE2
- Streaming SIMD Extensions 2, an instruction set extension for x86 processors.
- emit_move_insn
- A GCC internal function used to generate instructions for moving data.
- RTX
- Representation Tree Expression, GCC's internal representation of code that isn't yet in GIMPLE form.