Add AVX10/v2 FP32 to FP8 Single-Source RTO converts.
Enables FP32 to FP8 conversions using AVX10/v2 intrinsics with Single-Source Round-To-Odd (RTO) behavior.
This commit introduces AVX10/v2 intrinsics for converting FP32 (single-precision float) to FP8 (BF8/HF8) formats, specifically supporting Single-Source Round-To-Odd (RTO) behavior. It adds support for 128, 256, and 512-bit vectors, including masked operations. New intrinsic definitions, built-in descriptions, and machine code patterns are included, along with test cases, to enable these specialized conversions for AI and HPC workloads on compatible x86 hardware.
In Details
This patch adds AVX10/v2 intrinsics for FP32 to FP8 (BF8/HF8) conversions with Single-Source Round-To-Odd (RTO) semantics. It supports 128, 256, and 512-bit vectors with various masking options. The new intrinsics are defined in avx10v2auxintrin.h, and supporting definitions are added to i386-builtin.def and sse.md. A new test file is included in gcc.target/i386/ to verify the RTO conversion behavior. This enables specialized floating-point arithmetic for AI workloads on x86 architectures.
- RTO
- Round-To-Odd. A specific rounding mode for floating-point conversions that rounds the result to the nearest representable number, with ties rounded to the odd significand. This can be used in some specialized formats or for specific numerical algorithms.
- FP32
- Single-precision floating-point format, a standard 32-bit representation for floating-point numbers defined by IEEE 754, commonly used in general-purpose computing.
- FP8
- An 8-bit floating-point format, increasingly used in machine learning and AI accelerators for its reduced memory footprint and computational cost compared to FP16 or FP32.
- AVX10/v2
- An extension to the AVX (Advanced Vector Extensions) instruction set for x86 processors, introducing new features and capabilities, including support for newer floating-point formats like FP8.
- Intrinsics
- Special functions or constructs provided by a compiler that allow programmers to access low-level hardware instructions directly, often for performance-critical operations like vector arithmetic.